

Job Details
- Job Type – Full-Time
- Apply Before – September29,2020
- Salary – Negotiable
Job Requirements
- Experience Required –
- Gender Required – Male & Female
- Qualifications Degree Required – Degree Bachelor
- Experience You Gain – Entry Level
0-1 Years
Job Description
Company Name: Microchip Role: Engineer I – Design Verification Exp: 0-1 year Responsibilities:Responsible for preparing Verification plan from the IP/System specification document.Responsible for developing Verification environment using System Verilog.Responsible for developing random and directed test cases. Develop System Verilog assertions/cover pointJob Requirements:0-1 year of industry work experience.Languages: Verilog/System Verilog.EDA Tools: NC Sim Good understanding of digital design fundamentals.Proficient with Unix environment and common scripting languages.Knowledge about block level verification activities and test case development.Understanding on SOC level verification activities and debugging simulation failures.Knowledge of revision control tools like SVN.Should be able to handle tasks independently.Should be a quick learner.Good communication skills and the ability to work in a team environment.
Location: Chennai, IN