Seagate – Intern-VLSI

Seagate – Intern-VLSI

Job Details

  • Job Type – Full-Time
  • Apply Before – September9,2020
  • Salary – Negotiable

Job Requirements

  1. Experience Required –0 Year
  2. Gender Required – Male & Female
  3. Qualifications Degree Required – Degree Bachelor
  4. Experience You Gain – Entry Level

Job Description

Company Name: Seagate  Role: Intern-VLSI About the Role – You Will:Be able to work on block level Physical Design implementation using two or more EDA tools for Synthesis, floor-planning, placement, timing analysis, IR drop analysis and Physical verificationDo basic synthesis set-up, understand the inputs required to perform the tasks, understand the tasks, understand Semicustom IC design flow using IP libraries, concepts of Verilog netlist, meaning of timing constraints and QOR checksWork on Physical design tasks including floor-planning, placement, clock tree synthesis, routing, timing analysis, IR drop analysis and equivalence checking for flat designsWork on Physical verification tasks including creating setup and scripts for DRC, LVS, Antenna and density checks, report generation, analysis, debug and implementing the fixes in the physical design databaseWork on Timing analysis tasks including understanding of sign-off corners and modes, report generation, analysis of the reports and suggesting timing/DRC fixes to fix the violationsWork on IR drop analysis, be able to do basic set-up, understand the inputs required to perform the tasks, understand the tasks, reports generation and analysis, suggest fixes for the violations. Understand static, dynamic IR and EM analysisComplete internship project as per planAbout You:Knowledge of ASIC design flow and toolsGood understanding of Circuit design and Logic designGood understanding of analog circuit design and conceptsGood understanding of timing concepts like setup time, hold time requirements, calculations of maximum frequency of circuit operations, effect of transition and load on circuit performance and powerBasic understanding of CMOS fabrication processBasic understanding of layout design for CMOS and BJTBasic understanding of power dissipation in different types of circuitsSelf-motivated & a strong team playerStrong analytical skillsAbility to quickly learn new tools and technologiesYour Experience Includes:ASIC design flow, EDA tools for Physical design implementationSynthesis, DFT, Place and Route, Floor Planning, Timing Analysis, IR drop AnalysisPerl, Tcl, Shell or other scripting languages

Location: Pune, IN